Intro -- A One-Semester Course in Modeling of VLSI Interconnections -- Dedication -- Table of Contents -- Preface -- Acknowledgments -- CHAPTER 1: Introductory Concepts -- CHAPTER 2: Modeling of Interconnection Resistances, Capacitances, and Inductances -- CHAPTER 3: Modeling of Interconnection Delays -- CHAPTER 4: Modeling of Interconnection Crosstalk -- CHAPTER 5: Modeling of Electromigration-Induced Interconnection Failure -- CHAPTER 6: Other Interconnection Technologies -- APPENDIX A: Tables of Constants -- APPENDIX B: Method of Images -- APPENDIX C: Method of Moments -- APPENDIX D: Transmission Line Equations -- APPENDIX E: Miller's Theorem -- APPENDIX F: Inverse Laplace Transformation Technique -- Index -- Ad page.

Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. A One-Semester Course in Modeling of VLSI Interconnections also includes an overview of the future interconnection technologies for the nanotechnology circuits.

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Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2018. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.