Signal Integrity and Radiated Emission of High-Speed Digital Systems.

By: Caniggia, SpartacoContributor(s): Maradei, FrancescaromanaMaterial type: TextTextPublisher: New York : John Wiley & Sons, Incorporated, 2008Copyright date: ©2009Edition: 1st edDescription: 1 online resource (554 pages)Content type: text Media type: computer Carrier type: online resourceISBN: 9780470772881Subject(s): Crosstalk | Digital electronics | Electromagnetic interference | Signal processing | Very high speed integrated circuitsGenre/Form: Electronic books.Additional physical formats: Print version:: Signal Integrity and Radiated Emission of High-Speed Digital SystemsDDC classification: 621.382/24 LOC classification: TK7867.2.C36 2008Online resources: Click to View
Contents:
Intro -- SIGNAL INTEGRITY AND RADIATED EMISSION OF HIGH-SPEED DIGITAL SYSTEMS -- Contents -- List of Examples -- Foreword -- Preface -- 1 Introduction to Signal Integrity and Radiated Emission in a Digital System -- 1.1 Power and Signal Integrity -- 1.1.1 Power Distribution Network -- 1.1.2 Signal Distribution Network -- 1.1.3 Noise Limitations and Design for Characteristic Impedance -- 1.2 Radiated Emission -- 1.2.1 Definition of Radiated Emission Sources -- 1.2.2 Radiated Emission Standards -- 1.2.3 Radiated Emission from a Real System -- 1.3 Signaling and Logic Devices -- 1.3.1 Overshoot, Undershoot and Plateau -- 1.3.2 Noise Immunity -- 1.3.3 Timing Parameters -- 1.3.4 Eye Diagram -- 1.4 Modeling Digital Systems -- 1.4.1 Mathematical Tools -- 1.4.2 Spice-Like Circuit Simulators -- 1.4.3 Full-Wave Numerical Tools -- 1.4.4 Professional Simulators -- References -- 2 High-Speed Digital Devices -- 2.1 Input/Output Static Characteristic -- 2.1.1 Current and Voltage Specifications -- 2.1.2 Transistor-Transistor Logic (TTL) Devices -- 2.1.3 Complementary Metal Oxide Semiconductor (CMOS) Devices -- 2.1.4 Emitter-Coupled Logic (ECL) Devices -- 2.1.5 Low-Voltage Differential Signal (LVDS) Devices -- 2.1.6 Logic Devices Powered and the Logic Level -- 2.2 Dynamic Characteristics: Gate Delay and Rise and Fall Times -- 2.3 Driver and Receiver Modeling -- 2.3.1 Types of Driver Model -- 2.3.2 Driver Switching Currents Path -- 2.3.3 Driver Non-Linear Behavioral Model -- 2.3.4 Receiver Non-Linear Behavioral Modeling -- 2.4 I/O Buffer Information Specification (IBIS) Models -- 2.4.1 Structure of an IBIS Model -- 2.4.2 IBIS Models and Spice -- References -- 3 Inductance -- 3.1 Loop Inductance -- 3.1.1 Inductances of Coupled Loops -- 3.1.2 Inductances of Thin Filamentary Circuits -- 3.1.3 Equivalent Circuit of Two Coupled Loops.
3.1.4 L Matrix of Two Coupled Conductors Having a Reference Return Conductor -- 3.1.5 L Calculation of a Three-Conductor Wire-Type Line -- 3.1.6 Frequency-Dependent Internal Inductance -- 3.2 Partial Inductance -- 3.2.1 Partial Inductances of Coupled Loops -- 3.2.2 Flux Area of Partial Inductance of Thin Filamentary Segments -- 3.2.3 Loop Inductance Decomposed into Partial Inductances -- 3.2.4 Self and Mutual Partial Inductance -- 3.2.5 Inductance Between Two Parallel Conductors -- 3.2.6 Loop Inductance Matrix Calculation by Partial Inductances -- 3.2.7 Partial Inductance Associated with a Finite Ground Plane -- 3.2.8 Solving Inductance Problems in PCBs -- 3.3 Differential Mode and Common Mode Inductance -- 3.3.1 Differential Mode Inductance -- 3.3.2 Common Mode Inductance -- References -- 4 Capacitance -- 4.1 Capacitance Between Conductors -- 4.1.1 Definition of Capacitance -- 4.1.2 Partial Capacitance and Capacitance Matrix of Two Coupled Conductors Having a Reference Return Conductor -- 4.1.3 Capacitance Matrix of n Coupled Conductors Having a Reference Return Conductor -- 4.2 Differential Mode and Common Mode Capacitance -- 4.2.1 Differential Mode Capacitance -- 4.2.2 Common Mode Capacitance -- References -- 5 Reflection on Signal Lines -- 5.1 Electrical Parameters of Interconnects -- 5.1.1 Typical Interconnects -- 5.1.2 Equivalent Circuit of a Short Interconnect -- 5.1.3 Lossless Transmission Lines -- 5.1.4 Transmission-Line Modeling by Using Partial Inductances -- 5.2 Incident and Reflected Waves in Lossless Transmission Lines -- 5.2.1 Resistive Discontinuity -- 5.2.2 Capacitive Discontinuity -- 5.2.3 Reflections in Interconnects Terminated with Resistive Loads -- 5.2.4 Critical Length of Interconnects -- 5.2.5 Lattice Diagram for Reflection Calculation -- 5.2.6 Exact Model of a Lossless Transmission Line.
5.2.7 Graphical Solution for Line Voltages -- 5.3 Signal Distribution Architecture -- 5.3.1 Point-to-Point Structure -- 5.3.2 Star Structure -- 5.3.3 Chain Structure -- 5.3.4 Bus Structure -- 5.3.5 H-Tree Structure -- 5.3.6 Comb Structure -- 5.4 Line Terminations -- 5.4.1 Th évenin Termination -- 5.4.2 Series, Parallel, and AC Terminations -- 5.4.3 Series Termination and Comparison with Other Terminations by Circuit Simulations -- 5.4.4 Th évenin Termination Applied to Chain Structures and Circuit Simulations -- 5.4.5 Series Termination Applied to Chain Structures and Circuit Simulations -- 5.4.6 Th évenin Termination Applied to Bus Structures and Circuit Simulations -- 5.4.7 Termination and Interconnection Structures -- 5.4.8 Termination Performance -- References -- 6 Crosstalk -- 6.1 Lumped-Circuit Model of Coupled Lines -- 6.1.1 Equivalent Circuit of Two Coupled Lines with a Reference Ground -- 6.1.2 Capacitive Coupling -- 6.1.3 Inductive Coupling -- 6.1.4 Total Coupling -- 6.1.5 Simulations of Two Coupled Lines -- 6.2 Common and Differential Modes -- 6.2.1 Definition of Even and Odd Modes -- 6.2.2 Equivalent Circuit Based on Even and Odd Modes -- 6.2.3 Equivalent Circuit for the Differential Transmission Mode -- 6.2.4 Simulations of Point-to-Point and Chain Structure by Even and Odd Modes -- 6.3 Models for Digital Devices: Simulation and Measurements -- 6.4 General Distributed Model for Lossless Multiconductor Transmission Lines -- 6.4.1 Equivalent Circuit of n Coupled Lossless Lines -- 6.4.2 Measurements and Simulations of Five Coupled Lines with TTL and CMOS Devices -- 6.5 Techniques to Reduce Crosstalk -- 6.5.1 Fixes to Reduce Crosstalk -- 6.5.2 Simulations of Coupled Lines with Grounded Traces used as a Shield -- 6.5.3 Full-Wave Numerical Simulations of Two Coupled Lines -- References -- 7 Lossy Transmission Lines.
7.1 Lossy Line Fundamental Parameters -- 7.1.1 Reflection Mechanism in a Lossy Line -- 7.1.2 Skin Effect -- 7.1.3 Proximity Effect -- 7.1.4 Lossy Dielectric Effect -- 7.1.5 Data Transmission with Lossy Lines -- 7.2 Modeling Lossy Lines in the Time Domain by the Segmentation Approach and Vector Fitting Technique -- 7.2.1 Circuit Extraction of Coaxial Cables -- 7.2.2 Circuit Extraction of Twisted-Pair Cables -- 7.3 Modeling Lossy Lines in the Time Domain by the Scattering Parameters Technique -- 7.4 Conclusions -- References -- 8 Delta I-Noise -- 8.1 Switching Noise -- 8.1.1 Power Distribution Network -- 8.1.2 Switching Current Path -- 8.1.3 Design Rules -- 8.2 Filtering Power Distribution -- 8.2.1 Filtering Multilayer PCBs -- 8.2.2 Measurement of Power Distribution Network Impedance -- 8.2.3 PCB Circuit Model Based on Radial Transmission Line Theory -- 8.3 Ground Bounce -- 8.3.1 Ground Bounce Mechanism -- 8.3.2 Circuit Simulations to Understand the Ground Bounce Mechanism -- 8.3.3 Measurements of an LVT Benchmark -- 8.4 Crosstalk and Switching Noise -- 8.4.1 Measurements and Simulations of the SQ-Test Board with Three Coupled Lines and 74AC04 Devices -- References -- 9 PCB Radiated Emission -- 9.1 Frequency Characterization of a Digital Signal -- 9.1.1 Spectrum of a Trapezoidal Waveform -- 9.1.2 Spectrum of Typical Noises -- 9.2 The Radiated Emission Problem -- 9.2.1 Radiation from a Wire Antenna -- 9.2.2 Common- and Differential-Mode Currents and Radiations -- 9.2.3 Emission Due to Line Asymmetrical Feed -- 9.2.4 Differential-Mode Current and Radiated Emission of a Transmission Line -- 9.2.5 Common-Mode Current and Radiated Emission of a Transmission Line -- 9.2.6 Image Plane -- 9.3 Emission from Traces -- 9.3.1 Antenna Models for Calculating the Radiation of Microstrip and Stripline Structures -- 9.4 Emission from ICs.
9.4.1 Radiated Emission Mechanism from Components in a PCB -- 9.5 Emission from a Real PCB -- 9.6 Emission from a PCB with an Attached Cable -- 9.6.1 Sources of Emission -- 9.6.2 Current- and Voltage-Driven Mechanisms with a Trace in a PCB -- 9.7 Differential Drivers as Sources of Emission -- 9.7.1 Common-Mode Current with Differential Drivers -- 9.7.2 Radiated Field Mechanism of UTP and SFTP Cables -- 9.8 Emission from a Complex System -- 9.8.1 Emission Model of Coaxial Cables -- 9.8.2 Low-Frequency Model of an Aperture -- 9.9 Radiation Diagrams -- 9.10 Points to Remember and Design Rules for Radiated Emission -- References -- 10 Grounding in PCBs -- 10.1 Common-Mode Coupling -- 10.1.1 What is Ground? -- 10.1.2 Ground Loop Coupling and Transfer Impedance -- 10.1.3 Grounding Strategy -- 10.2 Ground and Power Distribution in a Multilayer PCB -- 10.2.1 Return Path for the Signal -- 10.2.2 Power (PWR) and Ground (GND) Layer Planning and Topology -- 10.2.3 Trace Changing Reference Plane -- 10.2.4 Split Power Plane -- 10.2.5 Moats/Barriers and Bridges -- 10.2.6 Stitches -- 10.3 Grounding at PCB Connectors -- 10.3.1 Ground Noise and Transfer Impedance -- 10.3.2 Pin Assignment -- 10.3.3 Grounding a PCB to a Chassis -- 10.3.4 Techniques to Limit Emission from Cables -- 10.4 Partitioning and Modeling -- 10.4.1 Modeling the Power Distribution with a Driver for Simulations -- 10.5 Points to Remember and Design Rules for Grounding in PCBs -- References -- 11 Measurement and Modeling -- 11.1 Time-Domain Reflectometer (TDR) -- 11.1.1 TDR as a 'Closed-Loop Radar' -- 11.1.2 TDR Resolution and Aberrations -- 11.1.3 TDR and Lossy Lines -- 11.1.4 Differential TDR -- 11.2 Vector Network Analyzer (VNA) -- 11.2.1 Scattering Parameter Definition -- 11.2.2 VNA Calibration -- 11.2.3 Extraction of Equivalent Circuits by S-Parameter Simulations.
11.2.4 Conclusions Concerning VNA Measurements and Simulations.
Summary: Before putting digital systems for information technology or telecommunication applications on the market, an essential requirement is to perform tests in order to comply with the limits of radiated emission imposed by the standards. This book provides an investigation into signal integrity (SI) and electromagnetic interference (EMI) problems. Topics such as reflections, crosstalk, switching noise and radiated emission (RE) in high-speed digital systems are covered, which are essential for IT and telecoms applications. The highly important topic of modelling is covered which can reduce costs by enabling simulation data to demonstrate that a product meets design specifications and regulatory limits. According to the new European EMC directive, this can help to avoid the expensive use of large semi-anechoic chambers or open area test sites for radiated emission assessments. Following a short introduction to signalling and radiated interference in digital systems, the book provides a detailed characterization of logic families in terms of static and dynamic characteristic useful for modelling techniques.  Crosstalk in multi-coupled line structures are investigated by analytical, graphical and circuit-based methods, and techniques to mitigate these phenomena are provided. Grounding, filtering and shielding with multilayer PCBs are also examined and design rules given. Written by authors with extensive experience in industry and academia. Explains basic conceptual problems from a theoretical and practical point of view by using numerous measurements and simulations. Presents models for mathematical and SPICE-like circuit simulators. Provides examples of using  full-wave codes for SI and RE investigations. Companion website containing lists of codes and sample material. Signal Integrity and Radiated Emission of High-Speed Digital Systems is a valuableSummary: resource to industrial designers of information technology, telecommunication equipment and automation equipment as well as to development engineers. It will also be of interest to managers and designers of consumer electronics, and researchers in electronics.
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Intro -- SIGNAL INTEGRITY AND RADIATED EMISSION OF HIGH-SPEED DIGITAL SYSTEMS -- Contents -- List of Examples -- Foreword -- Preface -- 1 Introduction to Signal Integrity and Radiated Emission in a Digital System -- 1.1 Power and Signal Integrity -- 1.1.1 Power Distribution Network -- 1.1.2 Signal Distribution Network -- 1.1.3 Noise Limitations and Design for Characteristic Impedance -- 1.2 Radiated Emission -- 1.2.1 Definition of Radiated Emission Sources -- 1.2.2 Radiated Emission Standards -- 1.2.3 Radiated Emission from a Real System -- 1.3 Signaling and Logic Devices -- 1.3.1 Overshoot, Undershoot and Plateau -- 1.3.2 Noise Immunity -- 1.3.3 Timing Parameters -- 1.3.4 Eye Diagram -- 1.4 Modeling Digital Systems -- 1.4.1 Mathematical Tools -- 1.4.2 Spice-Like Circuit Simulators -- 1.4.3 Full-Wave Numerical Tools -- 1.4.4 Professional Simulators -- References -- 2 High-Speed Digital Devices -- 2.1 Input/Output Static Characteristic -- 2.1.1 Current and Voltage Specifications -- 2.1.2 Transistor-Transistor Logic (TTL) Devices -- 2.1.3 Complementary Metal Oxide Semiconductor (CMOS) Devices -- 2.1.4 Emitter-Coupled Logic (ECL) Devices -- 2.1.5 Low-Voltage Differential Signal (LVDS) Devices -- 2.1.6 Logic Devices Powered and the Logic Level -- 2.2 Dynamic Characteristics: Gate Delay and Rise and Fall Times -- 2.3 Driver and Receiver Modeling -- 2.3.1 Types of Driver Model -- 2.3.2 Driver Switching Currents Path -- 2.3.3 Driver Non-Linear Behavioral Model -- 2.3.4 Receiver Non-Linear Behavioral Modeling -- 2.4 I/O Buffer Information Specification (IBIS) Models -- 2.4.1 Structure of an IBIS Model -- 2.4.2 IBIS Models and Spice -- References -- 3 Inductance -- 3.1 Loop Inductance -- 3.1.1 Inductances of Coupled Loops -- 3.1.2 Inductances of Thin Filamentary Circuits -- 3.1.3 Equivalent Circuit of Two Coupled Loops.

3.1.4 L Matrix of Two Coupled Conductors Having a Reference Return Conductor -- 3.1.5 L Calculation of a Three-Conductor Wire-Type Line -- 3.1.6 Frequency-Dependent Internal Inductance -- 3.2 Partial Inductance -- 3.2.1 Partial Inductances of Coupled Loops -- 3.2.2 Flux Area of Partial Inductance of Thin Filamentary Segments -- 3.2.3 Loop Inductance Decomposed into Partial Inductances -- 3.2.4 Self and Mutual Partial Inductance -- 3.2.5 Inductance Between Two Parallel Conductors -- 3.2.6 Loop Inductance Matrix Calculation by Partial Inductances -- 3.2.7 Partial Inductance Associated with a Finite Ground Plane -- 3.2.8 Solving Inductance Problems in PCBs -- 3.3 Differential Mode and Common Mode Inductance -- 3.3.1 Differential Mode Inductance -- 3.3.2 Common Mode Inductance -- References -- 4 Capacitance -- 4.1 Capacitance Between Conductors -- 4.1.1 Definition of Capacitance -- 4.1.2 Partial Capacitance and Capacitance Matrix of Two Coupled Conductors Having a Reference Return Conductor -- 4.1.3 Capacitance Matrix of n Coupled Conductors Having a Reference Return Conductor -- 4.2 Differential Mode and Common Mode Capacitance -- 4.2.1 Differential Mode Capacitance -- 4.2.2 Common Mode Capacitance -- References -- 5 Reflection on Signal Lines -- 5.1 Electrical Parameters of Interconnects -- 5.1.1 Typical Interconnects -- 5.1.2 Equivalent Circuit of a Short Interconnect -- 5.1.3 Lossless Transmission Lines -- 5.1.4 Transmission-Line Modeling by Using Partial Inductances -- 5.2 Incident and Reflected Waves in Lossless Transmission Lines -- 5.2.1 Resistive Discontinuity -- 5.2.2 Capacitive Discontinuity -- 5.2.3 Reflections in Interconnects Terminated with Resistive Loads -- 5.2.4 Critical Length of Interconnects -- 5.2.5 Lattice Diagram for Reflection Calculation -- 5.2.6 Exact Model of a Lossless Transmission Line.

5.2.7 Graphical Solution for Line Voltages -- 5.3 Signal Distribution Architecture -- 5.3.1 Point-to-Point Structure -- 5.3.2 Star Structure -- 5.3.3 Chain Structure -- 5.3.4 Bus Structure -- 5.3.5 H-Tree Structure -- 5.3.6 Comb Structure -- 5.4 Line Terminations -- 5.4.1 Th évenin Termination -- 5.4.2 Series, Parallel, and AC Terminations -- 5.4.3 Series Termination and Comparison with Other Terminations by Circuit Simulations -- 5.4.4 Th évenin Termination Applied to Chain Structures and Circuit Simulations -- 5.4.5 Series Termination Applied to Chain Structures and Circuit Simulations -- 5.4.6 Th évenin Termination Applied to Bus Structures and Circuit Simulations -- 5.4.7 Termination and Interconnection Structures -- 5.4.8 Termination Performance -- References -- 6 Crosstalk -- 6.1 Lumped-Circuit Model of Coupled Lines -- 6.1.1 Equivalent Circuit of Two Coupled Lines with a Reference Ground -- 6.1.2 Capacitive Coupling -- 6.1.3 Inductive Coupling -- 6.1.4 Total Coupling -- 6.1.5 Simulations of Two Coupled Lines -- 6.2 Common and Differential Modes -- 6.2.1 Definition of Even and Odd Modes -- 6.2.2 Equivalent Circuit Based on Even and Odd Modes -- 6.2.3 Equivalent Circuit for the Differential Transmission Mode -- 6.2.4 Simulations of Point-to-Point and Chain Structure by Even and Odd Modes -- 6.3 Models for Digital Devices: Simulation and Measurements -- 6.4 General Distributed Model for Lossless Multiconductor Transmission Lines -- 6.4.1 Equivalent Circuit of n Coupled Lossless Lines -- 6.4.2 Measurements and Simulations of Five Coupled Lines with TTL and CMOS Devices -- 6.5 Techniques to Reduce Crosstalk -- 6.5.1 Fixes to Reduce Crosstalk -- 6.5.2 Simulations of Coupled Lines with Grounded Traces used as a Shield -- 6.5.3 Full-Wave Numerical Simulations of Two Coupled Lines -- References -- 7 Lossy Transmission Lines.

7.1 Lossy Line Fundamental Parameters -- 7.1.1 Reflection Mechanism in a Lossy Line -- 7.1.2 Skin Effect -- 7.1.3 Proximity Effect -- 7.1.4 Lossy Dielectric Effect -- 7.1.5 Data Transmission with Lossy Lines -- 7.2 Modeling Lossy Lines in the Time Domain by the Segmentation Approach and Vector Fitting Technique -- 7.2.1 Circuit Extraction of Coaxial Cables -- 7.2.2 Circuit Extraction of Twisted-Pair Cables -- 7.3 Modeling Lossy Lines in the Time Domain by the Scattering Parameters Technique -- 7.4 Conclusions -- References -- 8 Delta I-Noise -- 8.1 Switching Noise -- 8.1.1 Power Distribution Network -- 8.1.2 Switching Current Path -- 8.1.3 Design Rules -- 8.2 Filtering Power Distribution -- 8.2.1 Filtering Multilayer PCBs -- 8.2.2 Measurement of Power Distribution Network Impedance -- 8.2.3 PCB Circuit Model Based on Radial Transmission Line Theory -- 8.3 Ground Bounce -- 8.3.1 Ground Bounce Mechanism -- 8.3.2 Circuit Simulations to Understand the Ground Bounce Mechanism -- 8.3.3 Measurements of an LVT Benchmark -- 8.4 Crosstalk and Switching Noise -- 8.4.1 Measurements and Simulations of the SQ-Test Board with Three Coupled Lines and 74AC04 Devices -- References -- 9 PCB Radiated Emission -- 9.1 Frequency Characterization of a Digital Signal -- 9.1.1 Spectrum of a Trapezoidal Waveform -- 9.1.2 Spectrum of Typical Noises -- 9.2 The Radiated Emission Problem -- 9.2.1 Radiation from a Wire Antenna -- 9.2.2 Common- and Differential-Mode Currents and Radiations -- 9.2.3 Emission Due to Line Asymmetrical Feed -- 9.2.4 Differential-Mode Current and Radiated Emission of a Transmission Line -- 9.2.5 Common-Mode Current and Radiated Emission of a Transmission Line -- 9.2.6 Image Plane -- 9.3 Emission from Traces -- 9.3.1 Antenna Models for Calculating the Radiation of Microstrip and Stripline Structures -- 9.4 Emission from ICs.

9.4.1 Radiated Emission Mechanism from Components in a PCB -- 9.5 Emission from a Real PCB -- 9.6 Emission from a PCB with an Attached Cable -- 9.6.1 Sources of Emission -- 9.6.2 Current- and Voltage-Driven Mechanisms with a Trace in a PCB -- 9.7 Differential Drivers as Sources of Emission -- 9.7.1 Common-Mode Current with Differential Drivers -- 9.7.2 Radiated Field Mechanism of UTP and SFTP Cables -- 9.8 Emission from a Complex System -- 9.8.1 Emission Model of Coaxial Cables -- 9.8.2 Low-Frequency Model of an Aperture -- 9.9 Radiation Diagrams -- 9.10 Points to Remember and Design Rules for Radiated Emission -- References -- 10 Grounding in PCBs -- 10.1 Common-Mode Coupling -- 10.1.1 What is Ground? -- 10.1.2 Ground Loop Coupling and Transfer Impedance -- 10.1.3 Grounding Strategy -- 10.2 Ground and Power Distribution in a Multilayer PCB -- 10.2.1 Return Path for the Signal -- 10.2.2 Power (PWR) and Ground (GND) Layer Planning and Topology -- 10.2.3 Trace Changing Reference Plane -- 10.2.4 Split Power Plane -- 10.2.5 Moats/Barriers and Bridges -- 10.2.6 Stitches -- 10.3 Grounding at PCB Connectors -- 10.3.1 Ground Noise and Transfer Impedance -- 10.3.2 Pin Assignment -- 10.3.3 Grounding a PCB to a Chassis -- 10.3.4 Techniques to Limit Emission from Cables -- 10.4 Partitioning and Modeling -- 10.4.1 Modeling the Power Distribution with a Driver for Simulations -- 10.5 Points to Remember and Design Rules for Grounding in PCBs -- References -- 11 Measurement and Modeling -- 11.1 Time-Domain Reflectometer (TDR) -- 11.1.1 TDR as a 'Closed-Loop Radar' -- 11.1.2 TDR Resolution and Aberrations -- 11.1.3 TDR and Lossy Lines -- 11.1.4 Differential TDR -- 11.2 Vector Network Analyzer (VNA) -- 11.2.1 Scattering Parameter Definition -- 11.2.2 VNA Calibration -- 11.2.3 Extraction of Equivalent Circuits by S-Parameter Simulations.

11.2.4 Conclusions Concerning VNA Measurements and Simulations.

Before putting digital systems for information technology or telecommunication applications on the market, an essential requirement is to perform tests in order to comply with the limits of radiated emission imposed by the standards. This book provides an investigation into signal integrity (SI) and electromagnetic interference (EMI) problems. Topics such as reflections, crosstalk, switching noise and radiated emission (RE) in high-speed digital systems are covered, which are essential for IT and telecoms applications. The highly important topic of modelling is covered which can reduce costs by enabling simulation data to demonstrate that a product meets design specifications and regulatory limits. According to the new European EMC directive, this can help to avoid the expensive use of large semi-anechoic chambers or open area test sites for radiated emission assessments. Following a short introduction to signalling and radiated interference in digital systems, the book provides a detailed characterization of logic families in terms of static and dynamic characteristic useful for modelling techniques.  Crosstalk in multi-coupled line structures are investigated by analytical, graphical and circuit-based methods, and techniques to mitigate these phenomena are provided. Grounding, filtering and shielding with multilayer PCBs are also examined and design rules given. Written by authors with extensive experience in industry and academia. Explains basic conceptual problems from a theoretical and practical point of view by using numerous measurements and simulations. Presents models for mathematical and SPICE-like circuit simulators. Provides examples of using  full-wave codes for SI and RE investigations. Companion website containing lists of codes and sample material. Signal Integrity and Radiated Emission of High-Speed Digital Systems is a valuable

resource to industrial designers of information technology, telecommunication equipment and automation equipment as well as to development engineers. It will also be of interest to managers and designers of consumer electronics, and researchers in electronics.

Description based on publisher supplied metadata and other sources.

Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2018. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.

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